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1. In 8085 microprocessor based system running at 3 MHz clock frequency what should be the minimum pulse width of the INTR signal, so that it is recognized successfully?





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  • By: guest on 02 Jun 2017 12.56 am
    T = x 106 = 0.333 μs 8085 checks INTR, one clock period before the last T-state of an instruction cycle. In 8085, CALL instruction requires 18 T-states. ∴ INTR pulse should be high at least for 17.5 T-states i.e. for 17.5 x 0.33 x 10-6 = 5.8 μs long.
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