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electronics and communication engineering power electronics
1. Assertion (A): SUS is a PUT and avalanche diode connected between gate and cathodeReason (R): SBS has two SUS inbuilt together and connected in anti-parallel
(A): A is correct but R is wrong
(B): A is wrong but R is correct
(C): Both A and R are correct and R is correct explanation of A
(D): Both A and R correct but R is not correct explanation of A
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