Question Set

1. In a parity generator circuit, an error is signaled on an error indicator.



Ask Your Doubts Here

Type in
(Press Ctrl+g to toggle between English and the chosen language)

Comments

Show Similar Question And Answers
QA->At the time of short-circuit; what will be the current in the circuit?....
QA->At the time of short-circuit, what will be the current in the circuit?....
QA->In athletics, what is signaled by firing twice the starting gun?....
QA->In the armature and the field magnet of a generator; the stationary part is the:....
QA->What is an Acid - base indicator?....
MCQ->In a parity generator circuit, an error is signaled on an error indicator.....
MCQ->An odd-parity generator produces an odd-parity bit to go along with the data. The parity of the transmitted data is _____ An XOR gate can test each received word for parity rejecting words with _____ parity.....
MCQ->A parity checker is constructed in the same way as a parity generator, except that in a 4-bit system there must be five inputs, and the output is used as the error indicator.....
MCQ->The XOR gates are ideal for testing parity because even-parity words produce a _____ output and odd-parity words produce a _____ output....
MCQ->Assertion (A): In 8085, P flag is for parity checking.Reason (R): If the result of ALU has even parity, P flag is set and if the result has odd parity, P flag is reset.

....
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use | Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...Privacy | Terms And Conditions
Question ANSWER With Solution