Question Set

1. When the outputs of several standard TTL gates are connected together, the gate outputs produce more fan-out.



Ask Your Doubts Here

Type in
(Press Ctrl+g to toggle between English and the chosen language)

Comments

Show Similar Question And Answers
QA->In an examination of mathematics Rajesh obtained more marks than the total marks obtained by Rahim and Sabu. The total marks obtained by Rahim and Saji was more than the Rajesh’s. Rajesh obtained more marks than Saji, Reenu obtained more marks than Rajesh. Who amongst them obtained the....
QA->BY selling a fan for Rs. 475, a person loses 5%. To get a gain of 5% he should sell the fan for....
QA->A and B can do a work in 12 days B and C together can do it in 15 days and C and A together in 20 days. If A,B,C work together, they will complete the work in?....
QA->A statement followed by two assumptions I and II is given. You have to consider the statement to be true even if it seems to be at variance from commonly known facts. You are to decide which of the given assumptions can definitely be drawn from the given statement. Indicate which one of the four given alternatives is correct ? Statement : If more encouragement is given to Sports, Indians will win more gold medals at the Olympic Games. Assumptions : I. Indians do not win gold medals. II. More enc....
QA->To make a notebook act as a desktop model, the notebook can be connected to a ………………….. which is connected to a monitor-and other devices.....
MCQ->When the outputs of several standard TTL gates are connected together, the gate outputs produce more fan-out.....
MCQ->When the outputs of several open-collector TTL gates are connected together, the gate outputs ________.....
MCQ->Assertion (A): Even if TTL gates and CMOS gates used in a realization have the same power supply of + 5 V, suitable circuit is needed to interconnect themReason (R): VOH, VOL, VIH and VIL of a TTL gave are respectively 2.4, 0.4, 2 and 0.8 V respectively. If supply voltage is + 5 V. VIL and VIH for CMOS gate for the supply voltage of + 5 V are 1.5 V and 3.5 V respectively.

....
MCQ->It is very likely in __________ gate family that when one gate is driving number of gates in __________ , a gate having least voltage for saturation may consume large __________ leaving other gates inoperative and this phenomenon is called __________ .....
MCQ->An output gate is connected to four input gates; the circuit does not function. Preliminary tests with the DMM indicate that the power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different ICs. Which instrument will best help isolate the problem?....
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use | Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...Privacy | Terms And Conditions
Question ANSWER With Solution