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1. Why are the maximum value of VOL and the minimum value of VOH used to determine the noise margin rather than the typical values for these parameters?




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MCQ->Why are the maximum value of VOL and the minimum value of VOH used to determine the noise margin rather than the typical values for these parameters?....
MCQ->For a logic family VOH is the minimum output high level voltage VOL is the maximum output low level voltageVIH is the minimum acceptable input high level voltageVIL is the maximum acceptable input low level voltage The correct relationship is....
MCQ->Assertion (A): Even if TTL gates and CMOS gates used in a realization have the same power supply of + 5 V, suitable circuit is needed to interconnect themReason (R): VOH, VOL, VIH and VIL of a TTL gave are respectively 2.4, 0.4, 2 and 0.8 V respectively. If supply voltage is + 5 V. VIL and VIH for CMOS gate for the supply voltage of + 5 V are 1.5 V and 3.5 V respectively.

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