Toggle navigation
Home
KPSC Previous Question Papers
Article Category
kerala psc
upsc
General
Popular Pages
Multiple Choice Question in aptitude-area
Multiple Choice Question in non-verbal-reasoning-grouping-of-images
Multiple Choice Question in aptitude-compound-interest
Multiple Choice Question in engineering-mechanics-kinetics-of-a-particle-impulse-and-momentum
Multiple Choice Question in database-database-redesign
Multiple Choice Question in 035/2016
Question Answer in malayalam-kerala-psc-questions
Multiple Choice Question in malayalam-kerala-psc-questions
Multiple Choice Question in current-affairs-2017-03-05
Question Answer in KERALA PSC
Multiple Choice Question in KERALA PSC
Multiple Choice Question in electronic-devices-bipolar-junction-transistors
Question Answer Bank
Multiple Choice Question Bank
Question Answer Category
Multiple Choice Question Category
Home
->
Multiple Choice Questions
Question Set
electronics sequential logic circuits
1. Synchronous construction reduces the delay time of a counter to the delay of __________.
(A): a single flip-flop and a gate
(B): a single gate
(C): all flip-flops and gates
(D): all flip-flops and gates after a 3 count
Previous Question
Show Answer
Next Question
Add Tags
Report Error
Show Marks
Ask Your Doubts Here
Type in
(Press Ctrl+g to toggle between English and the chosen language)
Post reply
Comments
Show Similar Question And Answers
QA->Which is the direction of rotation of a synchronous satellite of earth?....
QA->Pick out the phrasal verb which means the word underlined :The officer promised to examine my ear without delay....
QA->By the time they reached the bus stop the bus __________.....
QA->Time taken to complete the construction of the Great Pyramid in Egypt?....
QA->P takes twice as much time as Q or thrice as much time as R to finish a piece of work. They can finish the work in 2 days if work together. How much time will Q take to do the work alone?....
MCQ->4 bit ripple counter and 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then....
MCQ->Read the following statements The circuitry of ripple counter is more complex than that of synchronous counter.The maximum frequency of operation of ripple counter depends on the modulus of the counter.The maximum frequency of operation of synchronous counter does not depend on the modulus of the counter. Which of the above statements are correct?....
MCQ->Synchronous construction reduces the delay time of a counter to the delay of __________.....
MCQ->Synchronous construction reduces the delay time of a counter to the delay of:....
MCQ->Assertion (A): Synchronous counter has higher speed of operation than ripple counter Reason (R): Synchronous counter uses high speed flip flops.....
×
×
Type The Issue
×
Your Marks
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use | Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...
Privacy
|
Terms And Conditions
Question ANSWER With Solution