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electronics and communication engineering digital electronics
1. A full adder is to be implemented using half adders and OR gates. A 4 bit parallel adder without any initial carry requires
(A): 7 half adders and 3 OR gates
(B): 7 half adders and 4 OR gates
(C): 8 half adders and 3 OR gates
(D): 8 half adders and 4 OR gates
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