49201. The programming technologies that are used in FPGA devices include SRAM, flash, and antifuse, with flash being most common.
49202. The Altera UPIX educational development board contains an EP10K60 device in a 280-pin package.
49203. SPLD is a program language used by PLD software.
49204. The Boolean sum of the four product terms is called the sum-of-products.
49205. CPLDs and FPGAs are often referred to as high-capacity programmable logic devices (HCPLDs).
49206. In a PLD, a blown fuse at an OR gate is a LOW and a blown fuse at an AND gate is a HIGH.
49207. The hard core portions of FPGAs are reprogrammable in the field.
49208. The FPLA has a programmable AND array and a programmable OR array.
49209. The PAL structure is able to perform any sum-of-products (SOP) operation.
49210. Using a hardware solution for your digital system design is always faster than a software solution.
49211. A GAL is a programmable/reprogrammable PAL.
49212. Altera Corporation and Xilinx Corporation are the two leading PLD manufacturers.
49213. The PAL has an AND and OR structure similar to a PROM, but in the PAL the inputs to the AND gates are programmable, whereas the inputs to the OR gate are hard-wired.
49214. Gate arrays are ULSI circuits that offer hundreds of thousands of gates.
49215. Schematic capture is a process performed by PLD software.
49216. An expensive form of programmable logic is SPLD.
49217. Most PAL devices have a tristate buffer driving the input pins.
49218. The schematic editor allows you to connect with predefined logic symbols.
49219. VHDL code is divided into three sections: library declaration, entity declaration, and architecture body.
49220. All inputs to the MAX7000S device and all macrocell outputs feed the PIA.
49221. Sum-of-products is two or more product terms that are NANDed together.
49222. Most complex digital designs include a mix of different hardware categories.
49223. The Altera FLEX10K family uses a look-up table (LUT) architecture.
49224. PLDs cannot meet all the possible requirements of complex digital circuitry.
49225. The four input-only pins found on devices in the MAX7000S family can be configured as specific high-speed control signals or as general user inputs.
49226. In the OLMC of a GAL16V8, the FMUX selects the signal that is fed into the input matrix.
49227. A PAL consists of an array of fixed AND gates that are connected to a programmable array of OR gates.
49228. The MAX+PLUS II compiler will automatically program a macrocell to borrow up to six product terms from each of three adjacent macrocells in the same LAB.
49229. Antifuse devices are volatile.
49230. With microcomputer/DSP systems, devices can be electronically controlled and data can be manipulated by executing a program of instructions that has been written for the application.
49231. The major digital system categories include Boolean logic, ASICs, and microprocessor/DSP devices.
49232. The GAL chip uses an EEPROM array that is erasable and reprogrammable at least 1000 times.
49233. PLDs did not gain widespread acceptance with digital until the mid-1980s, when a device called a PAL was introduced.
49234. Expanders make it possible to increase the number of terms in a programmable SOP operation.
49235. The GAL16V8 has eight dedicated input pins.
49236. In the FLEX10K device, the LE can produce two outputs to drive local (LAB) and global (fast track) interconnects on the chip.
49237. The architecture of a PAL differs slightly from that of a PROM.
49238. LUT is an acronym for look-up table.
49239. A PAL uses a programmable OR array followed by a fixed AND array.
49240. The SRAM technology is volatile.
49241. The major structures of the MAX7000S are the logic array block (LAB) and the programmable intermediate array (PIA).
49242. All I/O pins in the MAX7000S family have a tristate buffer.
49243. Based on the high-density architecture of logic cells, FLEX10K devices are generally classified as HCPLDs.
49244. A CPLD is basically a simplified PLD.
49245. The GAL22V10 has 12 outputs pins and 10 input pins.
49246. The GAL16V8 has 32 input variables.
49247. Xilinx software uses triangular symbols called buffers to define pins as input or output.
49248. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmer interconnect that is used to connect internal logic modules is called a ________.
49249. In a FLEX10K device, the carry chain provides a fast carry forward function between ________.
49250. The Boolean expression (A + B)(C + D) is an example of ________.