49251. An Altera FLEX10K device uses a(n) ________ architecture.
49252. The ________ is the most popular standard logic device family today.
49253. A GAL22V10 ________.
49254. Most FPGA logic modules utilize a(n) ________ approach to create the desired logic functions.
49255. An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.
49256. A macrocell is ________.
49257. The final step in a design flow in which the logic design is implemented in the target device is called ________.
49258. In the GAL16V8, the ________ controls the tristate buffer's enable input.
49259. All inputs to the MAX7000S device and all macrocell outputs feed the ________.
49260. In the GAL16V8, the ________ selects the signal that is fed back into the input matrix.
49261. An application program in the development software package that controls the operation of the software is called a ________.
49262. Most complex digital designs include ________.
49263. Using a hardware solution for a digital system is always ________ than a software solution.
49264. The programming technologies that are used in FPGA devices include SRAM, flash, and antifuse, with ________ being the most common.
49265. A method for the automated testing of printed circuit boards is called a(n) ________.
49266. In a MAX7000S device, when an I/O pin is configured as an input, the associated macrocell can be used for ________.
49267. The process or sequence of all operations carried out to ultimately program a target device is called the ________.
49268. Full custom ICs can operate at ________ and require the ________.
49269. Gated arrays are ________ circuits that offer hundreds of thousands of gates.
49270. The MAX+PLUS II compiler will automatically program a macrocell to borrow up to ________ product terms from each of the 3 adjacent macrocells in the same LAB.
49271. A complex programmable logic device that consists of multiple SPLD arrays with programmable interconnections is called a ________.
49272. Design costs for standard cell ASICs are ________ those for MPGAs.
49273. The ________ can generate any possible logic function of the input variables because it generates every possible AND product term.
49274. The EPM 7128S is a(n) ________ device.
49275. The distinction between CPLDs and FPGAs is ________.
49276. ________ is a mature technology consisting of numerous subfamilies that have been developed over many years of use.
49277. The flexibility of the GAL16V8 is in its ________.
49278. The field programmable logic array was the first ________ programmable logic device.
49279. The GAL16V8 has architecture that is very similar to the ________ device.
49280. In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________.
49281. In a programmable logic device circuit diagram, the inputs to each of the OR gates are designated by ________.
49282. The SPLD classification includes the ________ PLD devices.
49283. In the MAX7000S device up to ________ signals can feed each LAB from the PIA.
49284. FLEX10K devices are generally classified as ________.
49285. The major structures in the MAX7000S are the ________ and ________.
49286. Four subcategories of ASIC devices are available to create digital systems. These are PLDs, gate arrays, standard cells, and ________.
49287. The Boolean expression AB + CD is an example of ________.
49288. The difference between a PLA and a PAL is:
49289. ALM is the acronym for ________.
49290. The GAL16V8 has:
49291. PALs tend to execute ________ logic.
49292. How many pins are in an EDF10K70 package?
49293. How can parallel data be taken out of a shift register simultaneously?
49294. What is meant by parallel load of a shift register?
49295. What does the output enable do on the 74395A chip?
49296. To operate correctly, starting a ring shift counter requires:
49297. In a 6-bit Johnson counter sequence there are a total of how many states, or bit patterns?
49298. A modulus-12 ring counter requires a minimum of ________.
49299. Stepper motors have become popular in digital automation systems because ________.
49300. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.