1. A TTL NAND gate with IIL(max) of –1.6 mA per input drives eight TTL inputs. How much current does the drive output sink?





Ask Your Doubts Here

Type in
(Press Ctrl+g to toggle between English and the chosen language)

Comments

Show Similar Question And Answers
QA->As per the revised Goods and Services Tax (GST) norms, the GST on Haj and Kailash Mansarovar Yatra has been reduced from 18 per cent to how much per cent?....
QA->A ship 55 km from the shore springs a leak which admits 2 tonnes of water in 6 minutes, 80 tonnes would suffice to sink her, but the pumps can throw out 12 tonnes an hour. The average rate of sailing that she may just reach the shore as she begins to sink is....
QA->A ship 55 km from the shore springs a leak which admits 2 tonnes of water in 6 minutes, 80 tonnes would suffice to sink her, but the pumps can throw out 12 tonnes an hour. The average rate of sailing that she may just reach the shore as she begins to sink is:....
QA->P takes twice as much time as Q or thrice as much time as R to finish a piece of work. They can finish the work in 2 days if work together. How much time will Q take to do the work alone?....
QA->Speed of a swimmer when moving in the direction perpendicular to the direction of the current is 16 km/h, speed of the current is 3 km/h. So the speed of the swimmer against the current will be (in km/h):....
MCQ->A TTL NAND gate with IIL(max) of –1.6 mA per input drives eight TTL inputs. How much current does the drive output sink?....
MCQ->A TTL NAND gate with IIH(max) of 40 A per input drives ten TTL inputs. How much current does the drive output source?....
MCQ->Inverter 74 LS04 has following specifications I0H max = - 0.4 mA, I0L max = 8 mA, IIH max = 20 μA, IIL max = 0.1 mA The fan out of this inverter is....
MCQ->Assertion (A): When all inputs of a NAND-gate are shorted to get a one input, one output gate, it becomes an inverter.Reason (R): When all inputs of a NAND-gate are at logic 'O' level, the output is at logic 'I' level.

....
MCQ->It is suspected that the comparator in the figure given below has a problem. The inputs are activated in the table shown below and the corresponding outputs noted. What is most likely wrong with the circuit? For P0 – P3 = 1 and Q0 – Q3 = 0, P > Q = 1, P = Q = 1, P < Q = 0 For P0 – P3 = 0 and Q0 – Q3 = 1, P > Q = 0, P = Q = 1, P < Q = 1 For P0 – P3 = 1 and Q0 – Q3 = 1, P > Q = 0, P = Q = 1, P < Q = 0

....
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use | Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...Privacy | Terms And Conditions
Question ANSWER With Solution