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electronics and communication engineering networks analysis and synthesis
1. Assertion (A): In an R-L circuit having low resistance, current lags the voltage by nearly 90°.Reason (R): Power factor of a series RL circuit is R/Z.
(A): A is false but R is true
(B): A is true but R is false
(C): Both A and R are true and R is correct explanation of A
(D): Both A and R are true and R is not the correct explanation of A
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