48052. A 555 operating as a monostable multivibrator has an R1 of 220 k. Determine C1 for a pulse width of 4 ms.
48053. What is one disadvantage of an S-R flip-flop?
48054. To completely load and then unload an 8-bit register requires how many clock pulses?
48055. Registration of Partnership is:
48056. Which of the following best describes the action of pulse-triggered FF's?
48057. An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.
48058. On a J-K flip-flop, when is the flip-flop in a hold condition?
48059. The output pulse width for a 555 monostable circuit with R1 = 3.3 k and C1 = 0.02 F is ________.
48060. Expand NDDS:
48061. As a general rule for stable flip-flop triggering, the clock pulse rise and fall times must be:
48062. A positive edge-triggered D flip-flop will store a 1 when ________.
48063. If an input is activated by a signal transition, it is ________.
48064. A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?
48065. A 555 operating as a monostable multivibrator has a C1 = 100 F. Determine R1 for a pulse width of 500 ms.
48066. Asynchronous inputs will cause the flip-flop to respond immediately with regard to the clock input.
48067. Which is not a real advantage of HDL?
48068. Two J-K flip-flops with their J-K inputs tied HIGH are cascaded to be used as counters. After four input clock pulses, the binary count is ________.
48069. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
48070. In VHDL, how is each instance of a component addressed?
48071. The output of a gated S-R flip-flop changes only if the:
48072. In VHDL, in which declaration section is a COMPONENT declared?
48073. A gated S-R latch and its associated waveforms are shown below. What, if anything, is wrong and what could be causing the problem?
48074. The output pulse width of a 555 monostable circuit with R1 = 4.7 k and C1 = 47 F is ________.
48075. If both inputs of an S-R flip-flop are low, what will happen when the clock goes HIGH?
48076. The circuit given below fails to function; the inputs are checked with a logic probe and the following indications are obtained: CLK, J1, J2, J3, K1, K2, and K3 are pulsing. Q and are HIGH. and PRE are LOW. What could be causing the problem?
48077. A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?
48078. A 555 timer is connected for astable operation as shown below along with the output waveform. It is determined that the duty cycle should be 0.5. What steps need to be taken to correct the duty cycle, while maintaining the same output frequency?
48079. The pulse width of a one-shot circuit is determined by ________.
48080. For an S-R flip-flop to be set or reset, the respective input must be:
48081. Which country accepted the policy Dual Citizenship?
48082. The KSCU is the biggest------body of the co-operative movement in the state.
48083. Four J-K flip-flops are cascaded with their J-K inputs tied HIGH. If the input frequency (fin) to the first flip-flop is 32 kHz, the output frequency (fout) is ________.
48084. A gated S-R flip-flop goes into the SET condition when S is HIGH, R is LOW, and EN is HIGH.
48085. VHDL does require a special designation for an output with a feedback.
48086. A negative edge-triggered flip-flop will accept inputs only when the clock is LOW.
48087. The term CLEAR always means that .
48088. PRESET and CLEAR inputs are normally synchronous.
48089. VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.
48090. The Q output of a flip-flop is normally HIGH when the device is in the "CLEAR" or "RESET" state.
48091. An astable multivibrator is sometimes referred to as a clock.
48092. The 7476 and 74LS76 are both dual flip-flops.
48093. The 7475 is an example of an IC D latch (also called a bistable latch) that contains four transparent D latches.
48094. In VHDL, each instance of a component is given a name followed by a semicolon and the name of the library primitive.
48095. The 555 timer can be used in either the astable or monostable modes.
48096. ICs can perform sequential operations, including counting and data shifting.
48097. An input which can only be accepted when an enable or trigger is present is called asynchronous.
48098. A J-K flip-flop and associated waveforms are shown below. The circuit is operating properly.
48099. All multivibrators require feedback.
48100. The propagation delay time tPLH is measured from the triggering edge of the clock pulse to the LOW-to-HIGH transition of the output.