1. Integrated-circuit counter chips are used in numerous applications including:
2. Synchronous construction reduces the delay time of a counter to the delay of:
3. Synchronous counters eliminate the delay problems encountered with asynchronous counters because the:
4. What is the difference between combinational logic and sequential logic?
5. What is the difference between a 7490 and a 7492?
6. What type of register is shown below?
7. When two counters are cascaded, the overall MOD number is equal to the ________ of their individual MOD numbers.
8. A MOD-12 and a MOD-10 counter are cascaded. Determine the output frequency if the input clock frequency is 60 MHz.
9. Which segments of a seven-segment display would be required to be active to display the decimal digit 2?
10. How many AND gates would be required to completely decode ALL the states of a MOD-64 counter, and how many inputs must each AND gate have?
11. What decimal value is required to produce an output at "X" ?
12. A BCD counter is a ________.
13. The circuit given below has no output on Q1 when examined with an oscilloscope. All J-K inputs are HIGH, the CLK signal is present, and the Q0 is toggling. The C input of FF1 is a constant LOW. What could be causing the problem?
14. How many flip-flops are required to construct a decade counter?
15. The terminal count of a typical modulus-10 binary counter is ________.
16. A seven-segment, common-anode LED display is designed for:
17. To operate correctly, starting a ring counter requires:
18. The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:
19. Select the response that best describes the use of the Master Reset on typical 4-bit binary counters.
20. For a multistage counter to be truly synchronous, the ________ of each stage must be connected to ________.
21. Which of the following is an invalid output state for an 8421 BCD counter?
22. How many different states does a 3-bit asynchronous counter have?
23. A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(tot)) is ________.
24. A four-channel scope is used to check the counter in the figure given below. Are the displayed waveforms correct?
25. Which of the following procedures could be used to check the parallel loading feature of a counter?