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You Are On Multi Choice Question Bank SET 963

48151. The signal used to identify edge-triggered flip-flops is ________.





48152. An edge-triggered flip-flop can change states only when ________.





48153. When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________.





48154. Plants that are derived from the vegetative organs of a single plant are known as?





48155. A gated S-R flip-flop goes into the CLEAR condition when ________.





48156. What type of multivibrator is a latch?





48157. HANTEX as the apex society established in:





48158. An astable multivibrator is a circuit that ________.





48159. The inputs on a 7474 D flip-flop are S, R, D, and CLK ________ is/are synchronous.





48160. An e-mail address typically consists of a user ID followed by the...........sign and the name of the e-mail server that manages the user’s electronic post office box?





48161. The asynchronous inputs on a J-K flip-flop ________.





48162. A positive edge-triggered flip-flop will accept inputs only when the clock ________.





48163. If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.





48164. The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.





48165. The action of ________ a FF or latch is also called resetting.





48166. The postponed symbol () on the output of a flip-flop identifies it as being ________.





48167. The advantage of a J-K flip-flop over an S-R FF is that ________.





48168. The ________ is the time interval immediately following the active transition of the clock signal.





48169. A gated S-R flip-flop is in the hold condition whenever ________.





48170. The toggle mode is the mode in which a(n) ________ changes states for each clock pulse.





48171. Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.





48172. Which statement BEST describes the operation of a negative-edge-triggered D flip-flop?





48173. Propagation delay time, tPLH, is measured from the ________.





48174. How is a J-K flip-flop made to toggle?





48175. How many flip-flops are in the 7475 IC?





48176. How many flip-flops are required to produce a divide-by-128 device?





48177. Which of the following summarizes the important features of ECL?





48178. What must be done to interface TTL to CMOS?





48179. What causes low-power Schottky TTL to use less power than the 74XX series TTL?





48180. What are the major differences between the 5400 and 7400 series of ICs?




48181. Which of the following statements apply to CMOS devices?





48182. What must be done to interface CMOS to TTL?





48183. What is the static charge that can be stored by your body as you walk across a carpet?





48184. What type of circuit is shown below, and how is the output ordinarily connected?





48185. What type of circuit is represented in the given figure, and which statement best describes its operation?





48186. Which of the following logic families has the highest noise margin?





48187. A "floating" TTL input may be defined as:





48188. Which of the logic families listed below allows the highest operating frequency?





48189. Refer to the given figure. What type of output arrangement is being used for the output?





48190. Refer the given figure. Which of the following describes the operation of the circuit?





48191. What type of logic circuit is shown below and what logic function is being performed?





48192. Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?





48193. What type of circuit is shown below and which statement best describes its operation?





48194. What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?





48195. A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:





48196. What does ECL stand for?





48197. What is unique about TTL devices such as the 74S00?





48198. Refer to the figure given below. What type of device is shown and what input levels are required to turn the LED off?





48199. Generally, the voltage measured at an unused TTL input would typically be measured between:





48200. The IEEE/ANSI notation of an internal underlined diamond denotes:





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