<<= Back Next =>>
You Are On Multi Choice Question Bank SET 966

48301. The greater the propagation delay, the ________.





48302. The main advantage of the successive-approximation A/D converter over the counter-ramp A/D converter is its:





48303. What is the current in the feedback resistor for the circuit given below?





48304. The quantization error in an analog-to-digital converter can be reduced by:





48305. One disadvantage of the tracking A/D converter is:





48306. If the range of output voltage of a 6-bit DAC is 0 to 15 volts, what is the step voltage of the output?





48307. The process by which a computer acquires digitized analog data is referred to as ________.





48308. What is the output voltage of the given circuit if the inputs are as follows: 20 = 1, 21 = 1, 22 = 0, 23 = 0?





48309. Describe offset error for a DAC.




48310. Two principal advantages of the dual-slope ADC are its:





48311. ________ are the most linear of all the temperature transducers.





48312. The basic approach to testing D/A converters is to:





48313. What is the maximum output voltage for the circuit shown below?





48314. One major difference between a counter-ramp A/D converter and a successive-approximation converter is:





48315. Which of the following characterizes an analog quantity?





48316. What is the resolution of a D/A converter?





48317. What is the conversion time of a flash converter?





48318. What is the speed of the up/down digital-ramp ADC (tracking ADC)?





48319. The practical use of binary-weighted digital-to-analog converters is limited to:





48320. What is the major advantage of the R/2R ladder DAC as compared to a binary-weighted-input DAC?





48321. An analog-to-digital converter has a four-bit output. How many analog values can it represent?





48322. When comparing the conversions from digital-to-analog and analog-to-digital, the A/D conversion is generally:





48323. Which of the statements below best describes the basic operation of a dual-slope A/D converter?





48324. The output of a basic 4-bit input digital-to-analog converter would be capable of outputting:





48325. Referring to the given figure, what appears to be wrong, if anything, with the D/A converter and what should be done to correct the problem?





48326. The head quarters of house Fed:





48327. What is the current in R1 and the current in R2 for the circuit shown below?





48328. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and maximum input voltage of 10 V.





48329. What is the accuracy of a D/A converter?




48330. Which of the equations below expresses the voltage gain relationship for an operational amplifier?





48331. An analog quantity varies from 0–7 V and is input to a 6-bit A/D converter. What analog value is represented by each step on the digital output?





48332. What function is performed by the block labeled X in the given figure?





48333. Inaccurate A/D conversion may be due to:





48334. What is the resolution, in percent, of a 12-bit DAC?





48335. What circuitry is on an ADC0808 IC?





48336. What is the maximum conversion time for an 8-bit successive-approximation ADC with a clock frequency of 20 kHz?





48337. What is one advantage to using a parallel-encoded (flash) ADC?




48338. If the same analog signal is to be converted to an 8-bit resolution using a counter-ramp ADC, how many comparator circuits would be used?





48339. What is the major advantage of the R/2R ladder D/A converter as compared to a binary-weighted D/A converter?





48340. What is the main disadvantage of the stairstep-ramp A/D converter?





48341. What is the purpose of a sample-and-hold circuit?





48342. What is the linearity of a D/A converter?




48343. Referring to the given figure, what should the display on the scope look like if the A/D converter is working properly?





48344. What is the acquisition time of the AD1154 sample-and-hold IC?





48345. What type of DAC is shown below?



48346. What is the disadvantage to using a counter-ramp type ADC?




48347. Referring to the given figure, what appears to be wrong, if anything, with the output of the D/A converter?





48348. What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock frequency of 20 kHz?





48349. A test system using the GPIB is being used to monitor a potentially dangerous crash test from a distance of 200 feet. The engineer decides to have you fabricate a special cable, rather than order one, since all the materials are on hand and the tests are already behind schedule. When the tests are run, the test system is erratic and the data is almost useless. What has gone wrong?





48350. A certain digital-to-analog converter has a step size of 0.25 V and a full-scale output of 7.75 V. Determine the percent of resolution and the number of input binary bits.





<<= Back Next =>>
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use | Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...Privacy | Terms And Conditions
Question ANSWER With Solution