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You Are On Multi Choice Question Bank SET 968

48401. There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.

48402. When analog inputs from several sources are to be converted, a(n) ________ technique can be used.

48403. The output of the circuit in the given figure (a) at point X on figure (b) will be ________.

48404. The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.

48405. The characteristic that a change of one binary step on the input of a DAC should cause exactly one step change on the output is called ________.

48406. On a binary-weighted D/A converter the least significant binary input ________.

48407. ________ ADCs use no clock signal, because there is no timing or sequencing required.

48408. The input of an analog-to-digital converter is ________.

48409. A(n) ________ converts an analog input to a digital output.

48410. The AD7524, a CMOS IC available from several IC manufacturers, is an eight-bit D/A converter that uses a(n) ________.

48411. A counter-ramp ADC uses a comparator to compare the input voltage with ________.

48412. A binary-weighter resistor DAC is practical only up to a resolution of ________.

48413. -----------Central Co-operative bank for each revenue district in Kerala

48414. The figure given below represents a ________.

48415. The primary disadvantage of the simultaneous A/D converter is ________.

48416. The DSO ________, ________, and ________ analog waveforms.

48417. A signal ________ is produced by sampling the signal at a rate less than the minimum rate identified by Nyquist.

48418. For each bit that is added to a digital ramp ADC, the conversion time ________.

48419. ________ DACs produce both positive and negative output values.

48420. A DAC is ________ if its output increases as the binary input increments from one value to the next.

48421. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________.

48422. A major application for DSP is in ________ and ________ of analog signals.

48423. The fastest analog-to-digital converter is the ________.

48424. The main advantage of the tracking A/D converter over the stairstep-ramp A/D converter is that ________.

48425. A counter-ramp ADC stops counting when ________.

48426. ________ ADCs have a fixed value of conversion time that is not dependent on the value of the analog input.

48427. The circuit shown below is a(n) ________.

48428. A digital voltmeter converts an analog voltage to its ________ representation.

48429. The number of binary bits at the input of a DAC or the output of an ADC is known as ________.

48430. The Diary farm of Europe is:

48431. If an analog signal is to be converted to an 8-bit resolution, how many comparators are used in a parallel-encoded ADC?

48432. A transducer is a device that:

48433. How many different voltages can be output from a DAC with a 6-bit resolution?

48434. A 4-bit R/2R D/A converter has a reference of 5 V. What is the analog output for the input code 0101?

48435. Which of the following describes the basic operation of a single-slope A/D converter.

48436. Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?

48437. Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate?

48438. What is the major advantage of ECL logic?

48439. As a general rule, the lower the value of the speed–power product, the better the device because of its:

48440. What is the range of invalid TTL output voltage?

48441. What is the difference between the 54XX and 74XX series of TTL logic gates?

48442. An open collector output can ________ current, but it cannot ________.

48443. Why is a decoupling capacitor needed for TTL ICs and where should it be connected?

48444. Using the schematic diagram of a TTL NAND gate, determine the state of each transistor (ON or OFF) when all inputs are high.

48445. If all inputs to a TTL NAND gate are low, what is the ON, OFF condition of each transistor in the circuit?

48446. Which of the following summarizes the important features of emitter-coupled logic (ECL)?

48447. Why is a pull-up resistor needed for an open collector gate?

48448. Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?

48449. The word "interfacing" as applied to digital electronics usually means:

48450. The rise time (tr) is the time it takes for a pulse to rise from its ________ point up to its ________ point. The fall time (tf) is the length of time it takes to fall from the ________ to the ________ point.

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