digital-electronics-digital-arithmetic-operations-and-circuits Related Question Answers
26. A half-adder circuit would normally be used each time a carry input is required in an added circuit.
29. Determine the two's-complement of each binary number.
00110 00011 11101
31. What distinguishes the look-ahead-carry adder?
35. Which of the following is correct for full adders?
36. Convert each of the signed decimal numbers to an 8-bit signed binary number (two's-complement).
+7 –3 –12
37. What is one disadvantage of the ripple-carry adder?
39. Divide the following binary numbers.
40. Convert the decimal numbers 275 and 965 to binary-coded decimal (BCD) and add. Select the BCD code groups that reflect the final answer.
41. When multiplying 13 × 11 in binary, what is the third partial product?
43. The selector inputs to an arithmetic/logic unit (ALU) determine the:
44. What is wrong, if anything, with the circuit in the given figure based on the logic analyzer display accompanying the circuit?
45. Which of the statements below best describes the given figure?
46. An 8-bit register may provide storage for two's-complement codes within which decimal range?
47. A full-adder adds ________.
48. The carry propagation delay in 4-bit full-adder circuits:
49. An input to the mode pin of an arithmetic/logic unit (ALU) determines if the function will be:
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