digital-electronics-programmable-logic-device Related Question Answers
26. What does the Altera FLEX10K PLD use in place of AND and OR arrays?
27. PIA is an acronym for ________.
28. Which one of the following is an embedded function of the Stratix II FPGA?
30. Which of the following testing procedures has one or more external moving parts?
31. Field-programmable gate arrays (FGPAs) use ________ memory technology, which is ________.
32. A PAL16L8 has:
33. Now many times can a GAL be erased and reprogrammed?
34. MPGA stands for:
35. Which of the following increases the number of product terms by borrowing unused product from other macrocells?
36. Which is a mode of operation of the GAL16V8?
37. Which of the following testing procedures uses the JTAG IEEE standard?
38. The macrocells in a PAL/GAL are located ________.
39. The content of a simple programmable logic device (PLD) consists of:
40. Which is a major digital system category?
41. What is the input/output pin configuration of the GAL22V10?
42. What does a dot mean when placed on a PLD circuit diagram?
43. FPGA is the acronym for ________.
45. What is the status of a tristate output buffer on a MAX7000S family device?
46. GAL is an acronym for ________.
47. What gives a GAL its flexibility?
48. What programmable technology is used in FPGA devices?
50. An SPLD listed as 22V10 has ________.
© 2002-2017 Omega Education PVT LTD...Privacy | Terms And Conditions
Question ANSWER With Solution