digital-electronics-shift-registers Related Question Answers

1. How can parallel data be taken out of a shift register simultaneously?





2. What is meant by parallel load of a shift register?



3. What does the output enable do on the 74395A chip?





4. To operate correctly, starting a ring shift counter requires:





5. In a 6-bit Johnson counter sequence there are a total of how many states, or bit patterns?





6. A modulus-12 ring counter requires a minimum of ________.





7. Stepper motors have become popular in digital automation systems because ________.





8. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.





9. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)





10. A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________.





11. With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________.





12. An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________.





13. A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?





14. The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?





15. If an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse?





16. How would a latch circuit be used in a microprocessor system?




17. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse.





18. How many clock pulses will be required to completely load serially a 5-bit shift register?





19. How is a strobe signal used when serially loading a shift register?





20. An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?





21. What are the three output conditions of a three-state buffer?





22. The primary purpose of a three-state buffer is usually:





23. What is the difference between a ring shift counter and a Johnson shift counter?





24. What is a recirculating register?




25. When is it important to use a three-state buffer?





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